Re: [PATCH 1/7] Documentation: ABI: rename sysfs-devices-cache_disableproperly

[David Rientjes]

On Wed, 21 Oct 2009, Alex Chiang wrote:

> Rename sysfs-devices-cache_disable to sysfs-devices-system-cpu, in
> order to keep a stricter correlation between a sysfs directory and
> its documentation.
> 
> Reported-by: David Rientjes <rientjes@xxxxxxxxxx>
> Signed-off-by: Alex Chiang <achiang@xxxxxx>

Adding Mark Langsdorf <mark.langsdorf@xxxxxxx> to the cc since this is his 
file and Ingo since he pushed it to Linus.

Acked-by: David Rientjes <rientjes@xxxxxxxxxx>

> ---
> 
>  .../ABI/testing/sysfs-devices-cache_disable        |   18 ------------------
>  Documentation/ABI/testing/sysfs-devices-system-cpu |   18 ++++++++++++++++++
>  2 files changed, 18 insertions(+), 18 deletions(-)
>  delete mode 100644 Documentation/ABI/testing/sysfs-devices-cache_disable
>  create mode 100644 Documentation/ABI/testing/sysfs-devices-system-cpu
> 
> diff --git a/Documentation/ABI/testing/sysfs-devices-cache_disable b/Documentation/ABI/testing/sysfs-devices-cache_disable
> deleted file mode 100644
> index 175bb4f..0000000
> --- a/Documentation/ABI/testing/sysfs-devices-cache_disable
> +++ /dev/null
> @@ -1,18 +0,0 @@
> -What:      /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
> -Date:      August 2008
> -KernelVersion:	2.6.27
> -Contact:	mark.langsdorf@xxxxxxx
> -Description:	These files exist in every cpu's cache index directories.
> -		There are currently 2 cache_disable_# files in each
> -		directory.  Reading from these files on a supported
> -		processor will return that cache disable index value
> -		for that processor and node.  Writing to one of these
> -		files will cause the specificed cache index to be disabled.
> -
> -		Currently, only AMD Family 10h Processors support cache index
> -		disable, and only for their L3 caches.  See the BIOS and
> -		Kernel Developer's Guide at
> -		http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
> -		for formatting information and other details on the
> -		cache index disable.
> -Users:    joachim.deguara@xxxxxxx
> diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
> new file mode 100644
> index 0000000..175bb4f
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
> @@ -0,0 +1,18 @@
> +What:      /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
> +Date:      August 2008
> +KernelVersion:	2.6.27
> +Contact:	mark.langsdorf@xxxxxxx
> +Description:	These files exist in every cpu's cache index directories.
> +		There are currently 2 cache_disable_# files in each
> +		directory.  Reading from these files on a supported
> +		processor will return that cache disable index value
> +		for that processor and node.  Writing to one of these
> +		files will cause the specificed cache index to be disabled.
> +
> +		Currently, only AMD Family 10h Processors support cache index
> +		disable, and only for their L3 caches.  See the BIOS and
> +		Kernel Developer's Guide at
> +		http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
> +		for formatting information and other details on the
> +		cache index disable.
> +Users:    joachim.deguara@xxxxxxx
> 
> 
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