Re: [PATCH v5 2/4] dt-bindings: document Rockchip thermal
From: Tomeu Vizoso
Date: Thu Sep 18 2014 - 10:19:53 EST
On 18 September 2014 15:25, Caesar Wang <caesar.wang@xxxxxxxxxxxxxx> wrote:
> Tomeu,
>
> å 2014å09æ18æ 17:27, Tomeu Vizoso åé:
>>
>> On 17 September 2014 05:59, Caesar Wang <caesar.wang@xxxxxxxxxxxxxx>
>> wrote:
>>>
>>> This add the necessary binding documentation for the thermal
>>> found on Rockchip SoCs
>>
>> Hi Caesar,
>>
>> is there any reason to not use the existing thermal bindings? You can
>> find a description in
>> Documentation/devicetree/bindings/thermal/thermal.txt and example code
>> in omap, or in the patches for Tegra recently posted by Mikko
>> Perttunen.
>>
>> Regards,
>>
>> Tomeu
>
>
> Why should I use the existing thermal bindings?
Because otherwise, you are asking to merge duplicated code. There's a
generic way to define thermal zones, trip points, cooling devices,
etc. And also code to parse and plug them together. Why add
soc-specific code to do the same?
> I believe omap,tegar and rockchip are the three seperate thermals driver.
Yes, and OMAP is already using the generic bindings, and the proposed
patches for Tegra as well, and I think it would make sense for
Rockchip to also use them (unless I'm missing something).
Regards,
Tomeu
> So far, I submitted the series Patchs for rockchip thermal.
>
>>
>>> Signed-off-by: zhaoyifeng <zyf@xxxxxxxxxxxxxx>
>>> Signed-off-by: Caesar Wang <caesar.wang@xxxxxxxxxxxxxx>
>>> ---
>>> .../bindings/thermal/rockchip-thermal.txt | 41
>>> ++++++++++++++++++++++
>>> 1 file changed, 41 insertions(+)
>>> create mode 100644
>>> Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>> b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>> new file mode 100644
>>> index 0000000..6fc8bc3
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
>>> @@ -0,0 +1,41 @@
>>> +* Temperature Sensor ADC (TSADC) on rockchip SoCs
>>> +
>>> +Required properties:
>>> +- compatible: "rockchip,rk3288-tsadc"
>>> +- reg: physical base address of the controller and length of memory
>>> mapped
>>> + region.
>>> +- interrupts: The interrupt number to the cpu. The interrupt specifier
>>> format
>>> + depends on the interrupt controller.
>>> +- clocks: Must contain an entry for each entry in clock-names.
>>> +- clock-names: Shall be "tsadc" for the converter-clock, and "apb_pclk"
>>> for
>>> + the peripheral clock.
>>> +- num-trips: number of total trip points, this is required, set it 0 if
>>> none,
>>> + if greater than 0, the following properties must be
>>> defined;
>>> +- tripN-temp: temperature of trip point N, should be in ascending order;
>>> +- tripN-type: type of trip point N, should be one of "active" "passive"
>>> "hot"
>>> + "critical";
>>> +- tripN-cdev-num: number of the cooling devices which can be bound to
>>> trip
>>> + point N, this is required if trip point N is defined,
>>> set it 0 if none,
>>> + otherwise the following cooling device names must be
>>> defined;
>>> +- tripN-cdev-nameM: name of the No. M cooling device of trip point N;
>>> +
>>> +Example:
>>> +tsadc: tsadc@ff280000 {
>>> + compatible = "rockchip,rk3288-tsadc";
>>> + reg = <0xff280000 0x100>;
>>> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
>>> + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
>>> + clock-names = "tsadc", "apb_pclk";
>>> +
>>> + num-trips = <2>;
>>> +
>>> + trip0-temp = <80>;
>>> + trip0-type = "passive";
>>> + trip0-cdev-num = <1>;
>>> + trip0-cdev-name0 = "thermal-cpufreq-0";
>>> +
>>> + trip1-temp = <100>;
>>> + trip1-type = "critical";
>>> + trip1-cdev-num = <1>;
>>> + trip1-cdev-name0 = "thermal-cpufreq-0";
>>> +};
>>> --
>>> 1.9.1
>>>
>>>
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>>
>>
>>
>
> --
> Best regards,
> Caesar
>
>
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