RE: [PATCH 1/2] stmmac: introduce flag to dynamically disable TX offload for rockchip devices

[Jose Abreu]

From: Robin Murphy <robin.murphy@xxxxxxx>
Date: Wed, Apr 03, 2019 at 17:12:03

> Yes, I would expect software checksumming to have a much more noticeable 
> impact (in fact I've already been trying to get round to benchmarking 
> some arm64 checksum optimisations on my RK3328 precisely because of this 
> issue).
> 

Can you share the optimizations ? ð

> If I'm interpreting the register descriptions in the Rockchip TRMs 
> correctly, it seems like no-pbl-x8 is a relatively big hammer and there 
> should still be room to tune things a bit closer to the maximum limits - 
> I'll have another play this evening to see if I've understood things right.

You can play around different PBL values without using the no-pbl-x8 option.

I would start with PBL=0x1 and then going up. If PBL=0x1 does not work then
add the no-pbl-x8 option and start with PBL=0x20 and keep decreasing.

Thanks,
Jose Miguel Abreu