Hello Yang,
On 7/25/23 12:42, Yang Shen wrote:
+ if (!(branch_type & PERF_SAMPLE_BRANCH_NO_CYCLES))
+ brbcr |= BRBCR_EL1_CC;
Hi Anshuman,
Here is problem about enable CYCLES_COUNT. The SPEC defines that the CYCLES_COUNT is only
valid when the BRECR_EL1.CC & BRBCR_EL2.CC is true. And here the SPEC also defines that
when PSTATE.EL == EL2 and HCR_EL2.E2h == '1', 'MSR BRBCR_EL1, <Xt>' means writing to
BRBCR_EL2 actually. So 'armv8pmu_branch_enable' can only set the BRBCR_EL2.CC, while the
BRECR_EL1.CC is still 0. The CYCLES_COUNT will be always 0 in records.
Agreed, this is a valid problem i.e BRBCR_EL1.CC and BRBCR_EL2.CC both needs to be set
for valid cycle count information regardless if the kernel runs in EL1 or EL2. A simple
hack in the current code setting BRBCR_EL12.C, which in turn sets BRBCR_EL1.CC when the
kernel runs in EL2 solves the problem.
As a solution, maybe BRBCR_EL12 should be added for driver according to the registers definition.
Right, will add the definition for BRBCR_EL12 in arch/arm64/tools/sysreg
Or, do you have a more standard solution?
Right, there are some nuances involved here.
Kernel could boot
a. Directly into EL2 and stays in EL2 for good
b. Directly into EL2 but switches into EL1
c. Directly into EL1 without ever going into EL2
In all the above cases BRBCR_EL1.CC and BRBCR_EL2.CC needs to be set when cycle count
is requested in the perf event interface (event->attr.branch_sample_type) via clearing
PERF_SAMPLE_BRANCH_NO_CYCLES.
- For the case as in (c) where kernel boots into EL1 directly and hence cannot ever set
EL2 register, BRBCR_EL2.CC would be a booting requirement - updated in booting.rst
- For the cases as in (a) and (b) kernel boots via EL2, hence there is an opportunity
to set both BRBCR_EL1.CC (via accessed BRBCR_EL12.CC) and BRBCR_EL2.CC. Depending on